Junior ASIC Backend Engineer

Join our team as an ASIC Backend Engineer!

Are you passionate about advanced ASIC development and eager to work at the forefront of technology? Do you thrive in a collaborative environment where your contributions truly matter? We are looking for candidates to expand our dynamic ASIC Backend team in Lund to help shape the future of our ARTPEC SoC chips.

Learn more; https://newsroom.axis.com/article/artpec-foundation-quality

Your future team

The ASIC System team is at the heart of developing the next generations of ARTPEC SoC chips. We are responsible for the SoC architecture and the ASIC implementation phase, playing a crucial role in both ongoing projects and future innovations. Our team consists of Project Managers, ASIC SoC System Architects and ASIC Back-End Engineers. We work closely with our ASIC vendor, internal RTL design and verification teams, and key stakeholders to ensure our SoC designs meet the highest standards.

We are a highly skilled and motivated team with a mix of junior and senior members. Our strength lies in our individual expertise and our collaborative, open working environment.

The team designs and implements the SoCs used in Axis products including security features that give our products a high level of trust in IoT ecosystems and enables interoperability with major IoT security standards.

For this we are now looking for candidates that want to join our ASIC Backend team.

What you will do as ASIC Backend Engineer

As an ASIC Backend Engineer, you will work with a broad range of tasks such as floor-planning, synthesis, equivalence checking, power integrity and timing closure. Our team has a key role in the implementation phase where we bring all new functionality into working silicon. This is done in close collaboration with the RTL design team as well as the ASIC vendor throughout all phases of the project.

The ASIC Backend Engineer plays an important role in the ASIC project and has a large impact on the performance and quality of the ARTPEC chips. You will be part of a team that have the expert knowledge of all implementation details and design checks required to get an optimal chip out of advanced ASIC technology nodes. We use state-of-the-art tools and design flows and are continuously improving our way of working to be ready for the next round of design complexity and technology challenges.

We are now looking for a junior ASIC Backend Engineer to strengthen our team. Some typical areas that you will participate in as ASIC Backend Engineer are:

• Top level floorplan and power planning
• Subsystem partitioning and macro placement
• Block and subsystem physical synthesis
• Low power implementation
• Top level I/O timing constraints development
• Timing optimizations and timing closure